Carlo Brandolese was born on March 17^th, 1970, in Milan, where he is currently living. He studied at the Politecnico di Milano from 1988 and he received his degree in Electronic Engineering in 1995. He has then been working as a CAD engineer at Italtel R&D Labs for two years. His activity is focused on the management of FPGA design flows and the support to the development of critical designs. He left Italtel in 1997 and attended a Master Course in Electronic Design Automation at CEFRIEL. His work was devoted to the development of a framework and a set of methodologies for hardware/software codesign. He received his Master’s degree in 1998. His activity in the field of co-design has then been focused on low-power issues in embedded systems, with particular attention to the software components. In 1997 he enrolled for a doctorate in Information Technology at Politecnico di Milano and he got his Ph.D. in 2000 with a dissertation on the power analysis of the software components for embedded systems. From 1998 to 2018 he has been a researcher at CEFRIEL, and from 2004 he is also researcher at the Department of Electronics, Information and Bioengineering at the Politecnico di Milano. His research activity mainly focused on the design and design methodologies of critical embedded system, in particular ultra-low power devices, wireless sensor networks and safety critical systems. Since 1997 he participated with technical responsibilities to more than 10 European Projects, has been responsible for research contracts in the field of embedded IoT systems and published more than 60 papers to international conferences and journals. In the last ten years he concentrated his effort to technology transfer, especially in conjunction with European Projects.