From Software Programs to Digital Circuits
Speaker: Prof. Lana Josipović
ETH, Zurich
DEIB - Beta Room (Bld. 24)
October 15th, 2024 | 11.00 am
Contact: Prof. Christian Pilato
ETH, Zurich
DEIB - Beta Room (Bld. 24)
October 15th, 2024 | 11.00 am
Contact: Prof. Christian Pilato
Sommario
On October 15th, 2024 at 11.00 am the seminar titled "From Software Programs to Digital Circuits" will take place at DEIB Beta Room (Building 24).
High-Level Synthesis (HLS) compilers enable programmers to automatically generate hardware designs from high-level software abstractions instead of writing tedious and time-consuming low-level hardware descriptions. However, today’s HLS compilers are still accessible only to expert users and for particular classes of applications; generating good-quality circuits still requires peculiar code restructuring and extensive experimentation with the tools. In this talk, I will discuss the challenges and limitations of current HLS approaches.
I will outline an alternative HLS technique that overcomes these limitations and achieves high parallelism in general-purpose software applications. Finally, I will share my vision on future advancements of HLS and hardware design.
High-Level Synthesis (HLS) compilers enable programmers to automatically generate hardware designs from high-level software abstractions instead of writing tedious and time-consuming low-level hardware descriptions. However, today’s HLS compilers are still accessible only to expert users and for particular classes of applications; generating good-quality circuits still requires peculiar code restructuring and extensive experimentation with the tools. In this talk, I will discuss the challenges and limitations of current HLS approaches.
I will outline an alternative HLS technique that overcomes these limitations and achieves high parallelism in general-purpose software applications. Finally, I will share my vision on future advancements of HLS and hardware design.
Biografia
Lana Josipović is an Assistant Professor in the Department of Information Technology and Electrical Engineering at ETH Zurich. Prior to joining ETH Zurich in 2022, she received a Ph.D. in Computer Science from EPFL. Her research interests include reconfigurable computing and electronic design automation. She is an Associate Editor for IEEE TCAD, ACM TRETS, and ACM TODAES, and served as general, program, and topic chair of several international conferences and workshops. She is a recipient of the EDAA Outstanding Dissertation Award, EPFL Doctorate Award, Google Ph.D. Fellowship in Systems and Networking, Google Women Techmakers Scholarship, and Best Paper Awards at ISFPGA'20 and FPL’24.
