Fabio Garzetti received his Bachelor degree and his Master degree in Electronic Engineering from the Politecnico di Milano.
He developed his thesis work in the Digital Electronics Lab of the DEIB on a topic regarding innovative solutions for calibration and triggering of asynchronous signals for Time-to-Digital Converters (TDCs) in Field Programmable Gate Arrays (FPGA). In the same group, he applied for the award of temporary research fellowships within the framework of the research programme "Design of modules for readout and processing of sampled data based on FPGA architectures", supported by CAEN ELS.